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Silicon Labs /Series0 /EFM32G /EFM32G890F32 /DAC0 /CH1CTRL

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Interpret as CH1CTRL

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (EN)EN 0 (REFREN)REFREN 0 (PRSEN)PRSEN 0 (PRSCH0)PRSSEL

PRSSEL=PRSCH0

Description

Channel 1 Control Register

Fields

EN

Channel 1 Enable
REFREN

Channel 1 Automatic Refresh Enable
PRSEN

Channel 1 PRS Trigger Enable
PRSSEL

Channel 1 PRS Trigger Select

0 (PRSCH0): PRS ch 0 triggers channel 1 conversion.

1 (PRSCH1): PRS ch 1 triggers channel 1 conversion.

2 (PRSCH2): PRS ch 2 triggers channel 1 conversion.

3 (PRSCH3): PRS ch 3 triggers channel 1 conversion.

4 (PRSCH4): PRS ch 4 triggers channel 1 conversion.

5 (PRSCH5): PRS ch 5 triggers channel 1 conversion.

6 (PRSCH6): PRS ch 6 triggers channel 1 conversion.

7 (PRSCH7): PRS ch 7 triggers channel 1 conversion.

Links

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Register License

  • SPDX-License-Identifier: Zlib
  • The licensor of this software is Silicon Laboratories Inc.
  • This software is provided ‘as-is’, without any express or implied
  • warranty. In no event will the authors be held liable for any damages
  • arising from the use of this software.
  • Permission is granted to anyone to use this software for any purpose,
  • including commercial applications, and to alter it and redistribute it
  • freely, subject to the following restrictions:
    1. The origin of this software must not be misrepresented; you must not
  • claim that you wrote the original software. If you use this software
  • in a product, an acknowledgment in the product documentation would be
  • appreciated but is not required.
    1. Altered source versions must be plainly marked as such, and must not be
  • misrepresented as being the original software.
    1. This notice may not be removed or altered from any source distribution.
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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data